Microsoft Windows CE Ethernet Bootloader Common Library Version 1.1 Built Sep 22 2009 14:42:03
Master Clock is 49920000 Hz

WinCE Ethernet Bootloader 1.7 for the EM9X60 boards (built Sep 22 2009)
Adaptation performed by EMTRONIX (c) 2009
->LLD_InitNandChipset K9F5608U0D
Master Clock is 49920000 Hz
---------------------------------------
--- Configuring Chip Select 3       ---
---------------------------------------
---         Desired timings         ---
---------------------------------------
dwNWE_SETUP      0
dwNCS_WR_SETUP   0
dwNRD_SETUP      0
dwNCS_RD_SETUP   0
dwNWE_PULSE      40
dwNCS_WR_PULSE   60
dwNRD_PULSE      40
dwNCS_RD_PULSE   80
dwNRD_CYCLE      100
dwNWE_CYCLE      60
dwClockPeriod_ns 20
---------------------------------------
---           Real timings          ---
---------------------------------------
dwNWE_SETUP      0
dwNCS_WR_SETUP   0
dwNRD_SETUP      0
dwNCS_RD_SETUP   0
dwNWE_PULSE      40
dwNCS_WR_PULSE   60
dwNRD_PULSE      40
dwNCS_RD_PULSE   80
dwNRD_CYCLE      100
dwNWE_CYCLE      60
->LLD_InitNandChipset K9F5608U0D
Master Clock is 49920000 Hz
---------------------------------------
--- Configuring Chip Select 3       ---
---------------------------------------
---         Desired timings         ---
---------------------------------------
dwNWE_SETUP      0
dwNCS_WR_SETUP   0
dwNRD_SETUP      0
dwNCS_RD_SETUP   0
dwNWE_PULSE      40
dwNCS_WR_PULSE   60
dwNRD_PULSE      40
dwNCS_RD_PULSE   80
dwNRD_CYCLE      100
dwNWE_CYCLE      60
dwClockPeriod_ns 20
---------------------------------------
---           Real timings          ---
---------------------------------------
dwNWE_SETUP      0
dwNCS_WR_SETUP   0
dwNRD_SETUP      0
dwNCS_RD_SETUP   0
dwNWE_PULSE      40
dwNCS_WR_PULSE   60
dwNRD_PULSE      40
dwNCS_RD_PULSE   80
dwNRD_CYCLE      100
dwNWE_CYCLE      60
Nand Flash correctly Initialized

EbootCfg Addr is 0x20000  crc: 0xF7F2  72 4 ) WDTC_WDMR = 3FFF2FFF
WDTC_WDMR = 8000

Press [ENTER] to launch image stored in flash or [SPACE] to cancel.

Initiating image launch in 5 seconds. 4 seconds. 3 seconds. 2 seconds. 1 seconds. 0 seconds. System ready!
Preparing for download...
memset 80067000 len=c92c94
FMD_DirectRead - OEMReadImgFromFlash - Addr = 24000
Download successful!  Jumping to image at 0x80068000 (physical 0x20068000)...



Master Clock is 49920000 Hz
]CE Kernel for ARM (Thumb Enabled) Built on Aug  4 2008 at 18:38:38
ProcessorType=0926  Revision=5
sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable = 80068020
Windows CE Firmware Init
+OALIntrInit
+OALIntrMapInit
-OALIntrMapInit
+SOCPioIntrInit()
-SOCPioIntrInit()
+OALIntrStaticTranslate(17, 21)
-OALIntrStaticTranslate
-OALIntrInit(rc = 1)
Initialize driver globals Zeros area...
pDrvGlobalArea 0x80058000  size 0x800 (0x80058800 -0x80058000)
Initialize driver globals Zeros area...done
<|>_QQiMaster Clock is 89856000 Hz
---------------------------------------
--- Configuring Chip Select 1       ---
---------------------------------------
---         Desired timings         ---
---------------------------------------
dwNWE_SETUP      0
dwNCS_WR_SETUP   0
dwNRD_SETUP      0
dwNCS_RD_SETUP   0
dwNWE_PULSE      0
dwNCS_WR_PULSE   0
dwNRD_PULSE      0
dwNCS_RD_PULSE   0
dwNRD_CYCLE      0
dwNWE_CYCLE      0
dwClockPeriod_ns 11
---------------------------------------
---           Real timings          ---
---------------------------------------
dwNWE_SETUP      0
dwNCS_WR_SETUP   0
dwNRD_SETUP      0
dwNCS_RD_SETUP   0
dwNWE_PULSE      0
dwNCS_WR_PULSE   0
dwNRD_PULSE      0
dwNCS_RD_PULSE   0
dwNRD_CYCLE      0
dwNWE_CYCLE      0
OALTimerInit
+OALTimerInit
Master Clock is 89856000 Hz
Test : 0x15f0
g_oalTimer.msecPerSysTick : 0x1
g_oalTimer.countsPerMSec : 0x15f0
g_oalTimer.countsMargin : 0x0
g_oalTimer.maxPeriodMSec : 0xb9
g_oalTimer.countsPerSysTick : 0x15f0
g_oalTimer.actualMSecPerSysTick : 0x1
g_oalTimer.actualCountsPerSysTick : 0x15f0
g_oalTimer.curCounts : 0x0
Master Clock is 89856000 Hz
-OALTimerInit
pDrvGlobalArea->bEboot == TRUE. Forcing Clean Object store
+OEMPowerManagerInit
-OEMPowerManagerInit
avant OALKitlStart -  force clean  (@0x80d55ed4 = 0x1) = TRUE 
OALKitlStart
Firmware Init Done.
+OEMInitWatchDogTimer
AT91SAM926x_DispWatchDog 8000!
force clean  (@0x80d55ed4 = 0x1) = TRUE 
EM9X60 Init
Master Clock is 89856000 Hz
---------------------------------------
--- Configuring Chip Select 5       ---
---------------------------------------
---         Desired timings         ---
---------------------------------------
dwNWE_SETUP      50
dwNCS_WR_SETUP   30
dwNRD_SETUP      50
dwNCS_RD_SETUP   30
dwNWE_PULSE      420
dwNCS_WR_PULSE   440
dwNRD_PULSE      420
dwNCS_RD_PULSE   440
dwNRD_CYCLE      500
dwNWE_CYCLE      500
dwClockPeriod_ns 11
---------------------------------------
---           Real timings          ---
---------------------------------------
dwNWE_SETUP      55
dwNCS_WR_SETUP   33
dwNRD_SETUP      55
dwNCS_RD_SETUP   33
dwNWE_PULSE      429
dwNCS_WR_PULSE   440
dwNRD_PULSE      429
dwNCS_RD_PULSE   440
dwNRD_CYCLE      517
dwNWE_CYCLE      517
->EM9160 Features Setup
EM9x60 Valid Check Passed
LCD...Not Connected on ISA
Sp=ffffc7cc
OEMIoControl: Unsupported Code 0x10100b4 - device 0x0101 func 45
+OALIoCtlHalInitRTC(...)
OEMIoControl: Unsupported Code 0x101008c - device 0x0101 func 35
->LLD_InitNandChipset K9F5608U0D
+OALIntrRequestSysIntr(1, 0x8d, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 16)
Master Clock is 89856000 Hz
---------------------------------------
--- Configuring Chip Select 3       ---
---------------------------------------
---         Desired timings         ---
---------------------------------------
dwNWE_SETUP      20
dwNCS_WR_SETUP   10
dwNRD_SETUP      20
dwNCS_RD_SETUP   10
dwNWE_PULSE      30
dwNCS_WR_PULSE   60
dwNRD_PULSE      50
dwNCS_RD_PULSE   60
dwNRD_CYCLE      80
dwNWE_CYCLE      80
dwClockPeriod_ns 11
---------------------------------------
---           Real timings          ---
---------------------------------------
dwNWE_SETUP      22
dwNCS_WR_SETUP   11
dwNRD_SETUP      22
dwNCS_RD_SETUP   11
dwNWE_PULSE      33
dwNCS_WR_PULSE   66
dwNRD_PULSE      55
dwNCS_RD_PULSE   66
dwNRD_CYCLE      88
dwNWE_CYCLE      88
+OALIntrReleaseSysIntr(16)
-OALIntrReleaseSysIntr(rc = 1)
->LLD_InitNandChipset K9F5 
--d-0NSd--DCDOEMIoControl: Unsupported Code 0x101-OEMdSPIDriver - SPI_Init - Context: Drivers\Active\03
Quit SPI Driver Installation!
SPIDriver - SPI_Init - Context: Drivers\Active\04
Quit SPI Driver Installation!
SPIDriver - SPI_Init - Context: DriverISPIDriver - SPI_Init - Context: DrivnOEMIoControl: Unsupported Code 0x10100d0 - device 0x0101 func 52
OEMIoControl: Unsupported Code 0x10100f8 - device 0x0101 func 62
Loading WinCE driver for ATMEL EMACB controller
Using registry ethernet configuration
-->EDeviceInitialize(0)
Issue Reset Pulse!
PHY ID : 181b881
PHY_GetConfiguration : autoneg not complete
PHY_WaitForAutonegociationComplete Autoneg not complete
Autonegociation failed
+OALIntrRequestSysIntr(1, 0x15, 0x00000008)
-OALIntrRequestSysIntr(sysIntr = 17)
USB:OhcdPdd_Init
++InitializeOHCI
+OALIntrRequestSysIntr(1, 0x14, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 18)
--InitializeOHCI
+OALIntrRequestSysIntr(1, 0xa, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 19)
+OALIntrRequestSysIntr(1, 0x85, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 20)
Master Clock is 89856000 Hz
DeviceFolder::LoadDevice!Enumerate Found deprecated load instructions at (Drivers\BuiltIn\AFD). Driver cannot be unloaded.
+OALIntrRequestSysIntr(1, 0x6, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 21)
Master Clock is 89856000 Hz
+OALIntrRequestSysIntr(1, 0x8, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 22)
Master Clock is 89856000 Hz
+OALIntrRequestSysIntr(1, 0x7, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 23)
Master Clock is 89856000 Hz
+OALIntrRequestSysIntr(1, 0x17, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 24)
Master Clock is 89856000 Hz
+OALIntrRequestSysIntr(1, 0x19, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 25)
Master Clock is 89856000 Hz
+OALIntrRequestSysIntr(1, 0x18, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 26)
Master Clock is 89856000 Hz
DeviceFolder::LoadDevice!Enumerate Found deprecated load instructions at (Drivers\BuiltIn\PPP). Driver cannot be unloaded.
-->EMACB::DeviceReset
-->EDeviceInitialize(1)
PHY ID : 181b881
PHY_GetConfiguration : autoneg not complete
+-->PWM_Init
+OALIntrRequestSysIntr(1, 0x1a, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 27)
+OALIntrRequestSysIntr(1, 0x1b, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 28)
+OALIntrRequestSysIntr(1, 0x1c, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 29)
Master Clock is 89856000 Hz
+OALIntrRequestSysIntr(1, 0x1e, 0x00000000)
-OALIntrRequestSysIntr(sysIntr = 30)
OEMIoControl: Unsupported Code 0x10100fc - device 0x0101 func 63

EM9160 built at Sep 22 2009 09:18:20
Adaptation performed by Emtronix (c)

 AdapterName: EMACB1PHY_WaitForAutonegociationComplete Autoneg not complete
Autonegociation failed
-->EMACB::DeviceReset
-->EDeviceInitialize(2)
PHY ID : 181b881
PHY_GetConfiguration : autoneg not complete

 CopyFile: 0
RegOpenKeyEx Comm\EMACB1 0
 IPAddr: 192.168.105.113    SunnetMask: 255.255.255.0    Gateway: 192.168.105.1

FileName:\NandFlash\dbginfo.txt
CreatFile 3BAA922
File bResult=1 nBytes=184
DHCP Disable
 IP Parameters aren<|>t changed, need not set AdapterIPProperties
PHY_WaitForAutonegociationComplete Autoneg not complete
Autonegociation failed
-->EMACB::DeviceReset
-->EDeviceInitialize(3)
PHY ID : 181b881
PHY_GetConfiguration : autoneg not complete
PHY_WaitForAutonegociationComplete Autoneg not complete
Autonegociation failed
-->EMACB::DeviceReset
-->EDeviceInitialize(4)
PHY ID : 181b881
PHY_GetConfiguration : autoneg not complete
PHY_WaitForAutonegociationComplete Autoneg not complete
Autonegociation failed
-->EMACB::DeviceReset
-->EDeviceInitialize(5)
PHY ID : 181b881
PHY_GetConfiguration : autoneg not complete
PHY_WaitForAutonegociationComplete Autoneg not complete
Autonegociation failed
-->EMACB::DeviceReset
-->EDeviceInitialize(6)
PHY ID : 181b881
PHY_GetConfiguration : autoneg not complete
.
.
.
.
.
.-->EDeviceInitialize(86)
PHY ID : 181b881
PHY_GetConfiguration : autoneg not complete
PHY_WaitForAutonegociationComplete Autoneg not complete
Autonegociation failed
-->EMACB::DeviceReset
-->EDeviceInitialize(87)
PHY ID : 181b881
PHY_GetConfiguration : autoneg not complete
.
.
.
.

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