guo
Post By：2010-8-8 9:11:00 [只看該作者]
您好,前幾天我購買兩塊9260的板子，其中有一塊連不上網(wǎng)絡，和貴公司的技術人員李工聯(lián)系，他讓我們參考網(wǎng)站上常用問題，但也沒有解決。他說需要更換內(nèi)核，由于我們這邊急用，所以給您聯(lián)系，請速發(fā)，謝謝。
主題：9260需要換內(nèi)核 共有36561人關注過本帖 |
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guo |
1樓 |
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9260需要換內(nèi)核 Post By：2010-8-8 9:11:00 [只看該作者]
您好,前幾天我購買兩塊9260的板子，其中有一塊連不上網(wǎng)絡，和貴公司的技術人員李工聯(lián)系，他讓我們參考網(wǎng)站上常用問題，但也沒有解決。他說需要更換內(nèi)核，由于我們這邊急用，所以給您聯(lián)系，請速發(fā)，謝謝。
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x10 |
2樓 |
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Post By：2010-8-8 10:04:00 [只看該作者]
請把EM9260的調(diào)試串口接到PC上，PC打開超級終端或串口調(diào)試助手一類的軟件，串口參數(shù)115200 8-N-1。然后啟動EM9260，把PC上接收到啟動信息發(fā)給我們看看呢？網(wǎng)絡方面，請確認IP等參數(shù)的設置，另外從PC上可以ping通EM9260嗎？
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gou |
3樓 |
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Post By：2010-8-9 8:57:00 [只看該作者]
昨天顯示的是亂碼，今天什么也不顯示。IP沒錯，但是ping不通，請速支援，謝謝！
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guo |
4樓 |
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Post By：2010-8-9 10:48:00 [只看該作者]
RomBOOT
> INFO : Low Level Init : OK FirstBoot::K9F2G08U0M 256MB Starting eboot ... Master Clock is 48049512 Hz PLLA_Divider=61 PLLA_Multiplier=661 Master Clock is 50002515 Hz Debug Serial Initialized Microsoft Windows CE Ethernet Bootloader Common Library Version 1.1 Built Jun 23 2010 13:27:52 Master Clock is 50002515 Hz WinCE Ethernet Bootloader 1.7 for the EM9X60 boards (built Jun 30 2010) Adaptation performed by EMTRONIX (c) 2009 ->LLD_InitNandChipset K9F5608U0D Master Clock is 50002515 Hz --------------------------------------- --- Configuring Chip Select 3 --- --------------------------------------- --- Desired timings --- --------------------------------------- dwNWE_SETUP 0 dwNCS_WR_SETUP 0 dwNRD_SETUP 0 dwNCS_RD_SETUP 0 dwNWE_PULSE 40 dwNCS_WR_PULSE 60 dwNRD_PULSE 40 dwNCS_RD_PULSE 80 dwNRD_CYCLE 100 dwNWE_CYCLE 60 dwClockPeriod_ns 20 --------------------------------------- --- Real timings --- --------------------------------------- dwNWE_SETUP 0 dwNCS_WR_SETUP 0 dwNRD_SETUP 0 dwNCS_RD_SETUP 0 dwNWE_PULSE 40 dwNCS_WR_PULSE 60 dwNRD_PULSE 40 dwNCS_RD_PULSE 80 dwNRD_CYCLE 100 dwNWE_CYCLE 60 ->LLD_InitNandChipset K9F2GU08U0A Master Clock is 50002515 Hz --------------------------------------- --- Configuring Chip Select 3 --- --------------------------------------- --- Desired timings --- --------------------------------------- dwNWE_SETUP 19 dwNCS_WR_SETUP 0 dwNRD_SETUP 19 dwNCS_RD_SETUP 0 dwNWE_PULSE 38 dwNCS_WR_PULSE 76 dwNRD_PULSE 38 dwNCS_RD_PULSE 76 dwNRD_CYCLE 76 dwNWE_CYCLE 76 dwClockPeriod_ns 20 --------------------------------------- --- Real timings --- --------------------------------------- dwNWE_SETUP 20 dwNCS_WR_SETUP 0 dwNRD_SETUP 20 dwNCS_RD_SETUP 0 dwNWE_PULSE 40 dwNCS_WR_PULSE 80 dwNRD_PULSE 40 dwNCS_RD_PULSE 80 dwNRD_CYCLE 80 dwNWE_CYCLE 80 Nand Flash correctly Initialized WDTC_WDMR = 3FFF2FFF WDTC_WDMR = 8000 Press [ENTER] to launch image stored in flash or [SPACE] to cancel. Initiating image launch in 5 seconds. 4 seconds. 3 seconds. 2 seconds. 1 seconds. 0 seconds. System ready! Preparing for download... memset 80067000 len=1c8c7c8 FMD_DirectRead - OEMReadImgFromFlash - Addr = 60000 Download successful! Jumping to image at 0x80068000 (physical 0x20068000)... Master Clock is 50002515 Hz ]CE Kernel for ARM (Thumb Enabled) Built on Aug 4 2008 at 18:38:38 ProcessorType=0926 Revision=5 sp_abt=ffff5000 sp_irq=ffff2800 sp_undef=ffffc800 OEMAddressTable = 80068020 +OALIntrInit +OALIntrMapInit -OALIntrMapInit +SOCPioIntrInit() -SOCPioIntrInit() +OALIntrStaticTranslate(17, 21) -OALIntrStaticTranslate -OALIntrInit(rc = 1) Initialize driver globals Zeros area... pDrvGlobalArea 0x80058000 size 0x800 (0x80058800 -0x80058000) Initialize driver globals Zeros area...done PLLA_Divider=61 PLLA_Multiplier=661 Master Clock is 100005030 Hz --------------------------------------- --- Configuring Chip Select 1 --- --------------------------------------- --- Desired timings --- --------------------------------------- dwNWE_SETUP 0 dwNCS_WR_SETUP 0 dwNRD_SETUP 0 dwNCS_RD_SETUP 0 dwNWE_PULSE 0 dwNCS_WR_PULSE 0 dwNRD_PULSE 0 dwNCS_RD_PULSE 0 dwNRD_CYCLE 0 dwNWE_CYCLE 0 dwClockPeriod_ns 10 --------------------------------------- --- Real timings --- --------------------------------------- dwNWE_SETUP 0 dwNCS_WR_SETUP 0 dwNRD_SETUP 0 dwNCS_RD_SETUP 0 dwNWE_PULSE 0 dwNCS_WR_PULSE 0 dwNRD_PULSE 0 dwNCS_RD_PULSE 0 dwNRD_CYCLE 0 dwNWE_CYCLE 0 OALTimerInit +OALTimerInit Master Clock is 100005030 Hz Test : 0x186a g_oalTimer.msecPerSysTick : 0x1 g_oalTimer.countsPerMSec : 0x186a g_oalTimer.countsMargin : 0x0 g_oalTimer.maxPeriodMSec : 0xa6 g_oalTimer.countsPerSysTick : 0x186a g_oalTimer.actualMSecPerSysTick : 0x1 g_oalTimer.actualCountsPerSysTick : 0x186a g_oalTimer.curCounts : 0x0 Master Clock is 100005030 Hz -OALTimerInit 這是啟動信息，請幫忙看下，謝謝 |
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x10 |
5樓 |
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Post By：2010-8-9 12:04:00 [只看該作者]
內(nèi)核啟動確實沒有成功，建議還是把板子寄回來我們處理，當天就會處理好并給你發(fā)出。
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