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���ã�ǰ��������˾��ُ�I��һ��EM9260V9.3�_�l(f��)ģ�K���F(xi��n)�����@ô�����}���{(di��o)ԇģʽ�¾����đ��ó������\�У������\��ģʽ�¾����đ��ó������\�������������ļ��������e�ģ��Dz��ǃ�(n��i)�˳����}�ˣ�����Ŀǰ��֪��ʲô�����@�K���İ岻����������MP3�ļ��������ϰ����ҹ�˾ُ�Iͬ��һ��EM9260������V9.0�ĺ����ǣ����r��֧��MP3���ŵģ�DA�������Լ����ġ�Ո���Ү�ǰ�@�K���ܟ���V9.0�ă�(n��i)�ˆᣬ��Ο�����Ո���V�ҟ����������x�x��
�����¸��_�C���ӽ��沿�ִ�ӡ��Ϣ�� Press [ENTER] to launch image stored in flash or [SPACE] to cancel. Initiating image launch in 0 seconds. System ready! Preparing for download... memset 80067000 len=1c8b7c0 FMD_DirectRead - OEMReadImgFromFlash - Addr = 60000 Download successful! Jumping to image at 0x80068000 (physical 0x20068000)... ]������?�z�ɹ�����ɁI5�����K����������ե�с���՝��?���� с��Қ�y��jR%����ͽ �Q�����ʒ���٥ͥ����jR4�}��������������}���������ႂ��}չ������������z5��ɕ ��Q����������j�t������??���f�ɕ�z1%���Mхѥ�QɅ�ͱ�ѕ5rjz1%��?���xɍ? �JjR��+�����镁�ɥٕ�?R?<|>F�� ?�Master Clock is 90004387 Hz --------------------------------------- --- Configuring Chip Select 1 --- --------------------------------------- --- Desired timings --- --------------------------------------- dwNWE_SETUP 0 dwNCS_WR_SETUP 0 dwNRD_SETUP 0 dwNCS_RD_SETUP 0 dwNWE_PULSE 0 dwNCS_WR_PULSE 0 dwNRD_PULSE 0 dwNCS_RD_PULSE 0 dwNRD_CYCLE 0 dwNWE_CYCLE 0 dwClockPeriod_ns 11 --------------------------------------- --- Real timings --- --------------------------------------- dwNWE_SETUP 0 dwNCS_WR_SETUP 0 dwNRD_SETUP 0 dwNCS_RD_SETUP 0 dwNWE_PULSE 0 dwNCS_WR_PULSE 0 dwNRD_PULSE 0 dwNCS_RD_PULSE 0 dwNRD_CYCLE 0 dwNWE_CYCLE 0 OALTimerInit +OALTimerInit Master Clock is 90004387 Hz Test : 0x15f9 g_oalTimer.msecPerSysTick : 0x1 g_oalTimer.countsPerMSec : 0x15f9 g_oalTimer.countsMargin : 0x0 g_oalTimer.maxPeriodMSec : 0xb9 g_oalTimer.countsPerSysTick : 0x15f9 g_oalTimer.actualMSecPerSysTick : 0x1 g_oalTimer.actualCountsPerSysTick : 0x15f9 g_oalTimer.curCounts : 0x0 Master Clock is 90004387 Hz -OALTimerInit pDrvGlobalArea->bEboot == TRUE. Forcing Clean Object store +OEMPowerManagerInit -OEMPowerManagerInit avant OALKitlStart - force clean (@0x81d5c9d4 = 0x1) = TRUE OALKitlStart Firmware Init Done. +OEMInitWatchDogTimer AT91SAM926x_DispWatchDog 8000! force clean (@0x81d5c9d4 = 0x1) = TRUE EM9X60 Init Master Clock is 90004387 Hz --------------------------------------- --- Configuring Chip Select 5 --- --------------------------------------- --- Desired timings --- --------------------------------------- dwNWE_SETUP 50 dwNCS_WR_SETUP 30 dwNRD_SETUP 50 dwNCS_RD_SETUP 30 dwNWE_PULSE 420 dwNCS_WR_PULSE 440 dwNRD_PULSE 420 dwNCS_RD_PULSE 440 dwNRD_CYCLE 500 dwNWE_CYCLE 500 dwClockPeriod_ns 11 --------------------------------------- --- Real timings --- --------------------------------------- dwNWE_SETUP 55 dwNCS_WR_SETUP 33 dwNRD_SETUP 55 dwNCS_RD_SETUP 33 dwNWE_PULSE 429 dwNCS_WR_PULSE 440 dwNRD_PULSE 429 dwNCS_RD_PULSE 440 dwNRD_CYCLE 517 dwNWE_CYCLE 517 ->EM9260 Features Setup EM9x60 Valid Check Passed EM9x60 Platform Check WinCE LCD...Type = 3, Started Sp=ffffc7cc OEMIoControl: Unsupported Code 0x10100b4 - device 0x0101 func 45 +OALIoCtlHalInitRTC(...) OEMIoControl: Unsupported Code 0x101008c - device 0x0101 func 35 ->LLD_InitNandChipset K9F5608U0D +OALIntrRequestSysIntr(1, 0x8d, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 16) Master Clock is 90004387 Hz --------------------------------------- --- Configuring Chip Select 3 --- --------------------------------------- --- Desired timings --- --------------------------------------- dwNWE_SETUP 19 dwNCS_WR_SETUP 0 dwNRD_SETUP 19 dwNCS_RD_SETUP 0 dwNWE_PULSE 38 dwNCS_WR_PULSE 76 dwNRD_PULSE 38 dwNCS_RD_PULSE 76 dwNRD_CYCLE 76 dwNWE_CYCLE 76 dwClockPeriod_ns 11 --------------------------------------- --- Real timings --- --------------------------------------- dwNWE_SETUP 22 dwNCS_WR_SETUP 0 dwNRD_SETUP 22 dwNCS_RD_SETUP 0 dwNWE_PULSE 44 dwNCS_WR_PULSE 77 dwNRD_PULSE 44 dwNCS_RD_PULSE 77 dwNRD_CYCLE 88 dwNWE_CYCLE 88 +OALIntrReleaseSysIntr(16) -OALIntrReleaseSysIntr(rc = 1) +OALIntrRequestSysIntr(1, 0x8d, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 16) Master Clock is 90004387 Hz --------------------------------------- --- Configuring Chip Select 3 --- --------------------------------------- --- Desired timings --- --------------------------------------- dwNWE_SETUP 10 dwNCS_WR_SETUP 0 dwNRD_SETUP 10 dwNCS_RD_SETUP 0 dwNWE_PULSE 30 dwNCS_WR_PULSE 40 dwNRD_PULSE 40 dwNCS_RD_PULSE 40 dwNRD_CYCLE 60 dwNWE_CYCLE 60 dwClockPeriod_ns 11 --------------------------------------- --- Real timings --- --------------------------------------- dwNWE_SETUP 11 dwNCS_WR_SETUP 0 dwNRD_SETUP 11 dwNCS_RD_SETUP 0 dwNWE_PULSE 33 dwNCS_WR_PULSE 44 dwNRD_PULSE 44 dwNCS_RD_PULSE 44 dwNRD_CYCLE 66 dwNWE_CYCLE 66 FMD_GetBlockStatus::Logical block 0x225 is marked as bad FMD_GetBlockStatus::Logical block 0x52C is marked as bad OEMIoControl: Unsupported Code 0x10100c4 - device 0x0101 func 49 OEMIoControl: Unsupported Code 0x10100c4 - device 0x0101 func 49 SPIDriver - SPI_Init - Context: Drivers\Active\03 Quit SPI Driver Installation! SPIDriver - SPI_Init - Context: Drivers\Active\04 Quit SPI Driver Installation! SPIDriver - SPI_Init - Context: Drivers\Active\05 Quit SPI Driver Installation! SPIDriver - SPI_Init - Context: Drivers\Active\06 Quit SPI Driver Installation! CAN Driver, Compiled at May 27 2010 10:50:16 +OALIntrRequestSysIntr(1, 0x1d, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 18) OEMIoControl: Unsupported Code 0x10100d0 - device 0x0101 func 52 OEMIoControl: Unsupported Code 0x10100f8 - device 0x0101 func 62 Loading WinCE driver for ATMEL EMACB controller Using registry ethernet configuration -->EDeviceInitialize(0) Hardware Reset PHY PHY ID : 181b881 PHY_GetConfiguration : autoneg not complete PHY_WaitForAutonegociationComplete Autoneg not complete Autonegociation failed +OALIntrRequestSysIntr(1, 0x15, 0x00000008) -OALIntrRequestSysIntr(sysIntr = 17) USB:OhcdPdd_Init ++InitializeOHCI +OALIntrRequestSysIntr(1, 0x14, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 19) --InitializeOHCI +OALIntrRequestSysIntr(1, 0xa, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 20) +OALIntrRequestSysIntr(1, 0x85, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 21) Master Clock is 90004387 Hz Quit Audio Driver Installation! [ERROR] "PDD_AudioInitialize() FAILED" CAN Driver, Compiled at May 27 2010 10:50:16 CAN_Init::quit CAN2 driver installation. DeviceFolder::LoadDevice!Enumerate Found deprecated load instructions at (Driver s\BuiltIn\AFD). Driver cannot be unloaded. +OALIntrRequestSysIntr(1, 0x6, 0x00000 000) -OALIntrRequestSysIntr(sysIntr = 22) Master Clock is 90004387 Hz +OALIntrRequestSysIntr(1, 0x8, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 23) Master Clock is 90004387 Hz +OALIntrRequestSysIntr(1, 0x7, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 24) Master Clock is 90004387 Hz +OALIntrRequestSysIntr(1, 0x17, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 25) Master Clock is 90004387 Hz +OALIntrRequestSysIntr(1, 0x19, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 26) Master Clock is 90004387 Hz +OALIntrRequestSysIntr(1, 0x18, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 27) Master Clock is 90004387 Hz DeviceFolder::LoadDevice!Enumerate Found deprecated load instructions at (Driver s\BuiltIn\PPP). Driver cannot be unloaded. ExSerInit::quit COM8 driver installati on. Hardware doesn<|>t init correctly, COM_Init failed -->EMACB::DeviceReset ExSerInit::quit COM9 driver installation. Hardware doesn<|>t init correctly, COM_Init failed ExSerInit::quit COM10 driver installation. Hardware doesn<|>t init correctly, COM_Init failed ExSerInit::quit COM11 driver installation. Hardware doesn<|>t init correctly, COM_Init failed ExSerInit::quit COM12 driver installation. Hardware doesn<|>t init correctly, COM_Init failed ExSerInit::quit COM13 driver installation. Hardware doesn<|>t init correctly, COM_Init failed ExSerInit::quit COM14 driver installation. Hardware doesn<|>t init correctly, COM_Init failed ExSerInit::quit COM15 driver installation. Hardware doesn<|>t init correctly, COM_Init failed +OALIntrRequestSysIntr(1, 0x1e, 0x00000000) -OALIntrRequestSysIntr(sysIntr = 28) OEMIoControl: Unsupported Code 0x10100fc - device 0x0101 func 63 EM9X60 built at May 27 2010 10:52:05 Adaptation performed by Emtronix (c) AdapterName: EMACB1-->EMACB::DeviceReset Explorer(V2.0) taskbar thread started. NDISPWR:: Found adapter [EMACB1] -->EMACB::DeviceReset -->EMACB::DeviceReset CopyFile: 0 RegOpenKeyEx Comm\EMACB1 0 IPAddr: 192.168.1.100 SunnetMask: 255.255.255.0 Gateway: 192.168.1.1 FileName:\NandFlash\dbginfo.txt CreatFile C3AE6F16 File bResult=1 nBytes=156 DHCP Disable IP Parameters aren<|>t changed, need not set AdapterIPProperties -->EMACB::DeviceReset |
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